1. Field of the Invention
The present invention relates to a semiconductor wafer having a characteristic evaluating device and a monitoring pad formed in a dicing area and a semiconductor chip obtained by cutting this wafer. Further, the present invention relates to a dicing method for cutting such a wafer.
2. Description of the Background Art
FIGS. 11A-11C are explanatory views showing one example of a conventional process for producing an IC (Integrated Circuit), wherein FIG. 11A shows a dicing process, FIG. 11B shows a state after dicing and FIG. 11C shows a wire bonding process. A wafer 1 is composed of a substrate 2 comprising a semiconductor of Si or GaAs and an electrical insulating layer 3 and/or metal wiring 4 formed on the substrate 2. Generally, chip areas where a large number of semiconductor devices are integrated are arranged in a matrix.
When an individual chip is taken out from the wafer 1, a blade 9 passes between each chip area for cutting each chip area as shown in FIG. 11A. When the metal wiring 4 exists on a passage line of the blade 9, a dicing stress is applied to the metal wiring 4 to cause a partial separation of the metal wiring 4 in the case of weak adhesion to a underlayer, with the result that a burr 4a is likely to occur as shown in FIG. 11B.
Consequently, when the individual chip is mounted on a lead frame 5 for connecting via a wire 6, there is a high possibility that the wire 6 comes in contact with the burr 4a, that becomes a factor of malfunction of a product.